Revision History

This page summarizes the changes and fixes to each version of the ACAD2APD.

layoutgen 107/acslib321 03/07/2011

New Via Layer

Added the ability to create a via layer (circles or polygons) and the ability to specify which layers this via layer interconnects. Currently there must be a shape above and below a via to make the interconnection but we soon intend to upgrade this to support pins either above and below the via.

layout2apd 105 03/07/2011

Updated the importer to handle the new vias.

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layoutgen 105/acslib309 02/22/2010

Gull Wing Via

added a new model for the gull wing lead. This one represents more accurately the lead that leaves the package body horizontally, drops down and then move horizontally again to the output pin on the PCB.

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acslib307 01/21/2010

Wing Via Net Problem Fixed

The wing via was not getting the correct net assigned to it. Earlier revision to the net tracing module designed to handle stacked die broke the wing via net connection. This has been fixed.

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acslib304 12/17/09

adds a filter to prevent the user from marking entities such as lines and arcs as shapes.

adds a filter to clean up net names that don't meet the Cadence rules - i.e. lower case and net names with spaces or special characters.

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acslib293_2007 10/15/09

line linking

The line linker was having problems with extremely short lines segments. They are now filtered out.

sybmol builder

The symbol builder did not retain the IC vs IO setting and would reset to IC. This has been fixed.

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LayoutGen 0.92 09/29/09

Initial Beta Release

This is the first beta release for the LayoutGen program.

acslib293_2007 09/29/09

Library for LayoutGen 0.92

This is acslib containing the required library support for LayoutGen 0.92

Layout2APD 0.91 09/29/09

Initial Beta Release

This is the first beta release for the import module running inside of APD 16.2.