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Overlay and Compare the Layouts

The final step is to overlay the layout from the wafer map with the layout from the shot map. The offset between the two layouts is the information we need to build our RDL template. We do this using the third tab in the dialog.

comparison_dialog.gif

The two files we created from tabs 1 and 2 are automatically loaded into this dialog. We don't want to apply any offset to the wafer map layout (since we don't yet know the correct offset value ...) and we do need to give a name for the comparison file.

Once we've done that we just hit Merge & View. After some adjustment of layers and colors we see something like this in Qckvu3:

compare_snapshot1.gif

It is now clear where the die have been knocked out in the wafer map layout. If we zoom into the lower right quadrant we can also see the offset.

offset_snapshot.gif

All we need to do now is to measure that offset which is easy to do with Qcvku3's ruler.

offset_measure_snapshot.gif

We can see that the wafer map layout needs to be offset by 0.3 mm in X and -0.460 mm in Y.

So go back to the first tab and re-run the layout of the wafer map. This time we will apply the offset and also turn on the cross hairs and the wafer margins in order to create a nice template.

second_conversion_w_offset_dialog.gif

We've changed the output name to RDL_TEMPLATE because we'll be using this for our RDL mask set template. Now let's make the comparsion a second time to insure no mistakes were made!

second_comparison_dialog.gif

Notice I changed the wafer map input file to RDL_TEMPLATE.gds and that I changed the Output file to compare2. Now I'll just run the Merge & View and make sure that the two files are perfectly overlaid.

second_comparison_snapshot.gif

You can see that the two layouts now perfectly align. If we zoom into the same lower right quadrant as before we can see this in detail.

second_comparison_snapshot_detail_view.gif

We're done. We now have a GDSII file (RDL_TEMPLATE.gds) that contains all of the die identified in the foundry's wafer map positioned exactly where the foundry positioned the die. We can use this as a template for placing our RDL circuits.








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